A system configuration with a processor connected to a RAM for address controlled data communications is characteristic of several commercial microcomputer systems. In order to ensure that the data are retained in the random access memory in the case where the associated power supply fails in said circuit arrangements, measures such as the two following ones have typically been taken: buffering by large filter/storage capacitor of the random access memory against a power failure; and redundant design of the random access memory against either self-induced faults or errors in one of the random access memories.
A power supply design which combines both fault protection measures, however, involves relatively high hardware costs, since the typical apparatus is designed for each power supply to have a capacity of twice the RAM operating current. In that way in case of failure of one power supply the remaining supply can single-handedly deliver the required current.